Solid-state imaging element and imaging apparatus

ABSTRACT

A solid-state imaging element of a pixel sharing type with improved driving of transistors is disclosed. A first electric charge accumulating section and a second electric charge accumulating section are arranged in a predetermined direction. A first transfer section transfers electric charge from first photoelectric conversion elements to the first electric charge accumulating section, causing it to accumulate the electric charge. A second transfer section transfers electric charge from second photoelectric conversion elements to the second electric charge accumulating section, causing it to accumulate the electric charge. A first transistor is configured to output a signal corresponding to an amount of the electric charge accumulated in each of the first electric charge accumulating section and the second electric charge accumulating section. A second transistor is arranged with the first transistor in the predetermined direction and connected in parallel to the first transistor.

CROSS REFERENCES TO RELATED APPLICATIONS

The present Application is a Continuation Application of U.S. patentapplication Ser. No. 17/321,019 filed May 14, 2021, which is aContinuation Application of U.S. patent application Ser. No. 16/610,292filed Nov. 1, 2019, now U.S. Pat. No. 11,031,421 issued on Jun. 8, 2021,which is a 371 National Stage Entry of International Application No.:PCT/JP2018/006609, filed on Feb. 23, 2018, which in turn claims priorityfrom Japanese Application No. 2017-110522, filed on Jun. 5, 2017, theentire contents of which are incorporated herein by reference.

TECHNICAL FIELD

The present technology relates to a solid-state imaging element and animaging apparatus. Specifically, the present technology relates to asolid-state imaging element and an imaging apparatus in which aplurality of photoelectric conversion elements shares transistors.

BACKGROUND ART

In the past, a solid-state imaging element has had a pixel sharing typestructure for the purpose of reducing the number of transistors perpixel. In the pixel sharing type structure, a plurality of pixels sharesa FD (Floating Diffusion) and transistors. For example, a solid-stateimaging element of an eight-pixel sharing type has been proposed (seePTL 1, for example). In the solid-state imaging element of theeight-pixel sharing type, eight pixels share a transistor groupincluding a selection transistor, an amplification transistor, and areset transistor.

CITATION LIST Patent Literature

-   [PTL 1]-   Japanese Patent Laid-Open No. 2013-62789

SUMMARY Technical Problems

In the above-described past technology, since the transistor group isshared by the eight pixels, the number of transistors per pixel can bereduced and the light receiving areas of the photoelectric conversionelements can be increased accordingly, as compared with a case where thetransistor group is not shared. However, in the above-describedsolid-state imaging element, each transistor is arranged betweenadjacent photodiodes. As a result, there is a possibility that anincrease in the size of the gate width or the like of the transistor mayrequire a reduction in the light receiving areas. Therefore, it isdifficult to increase the gate width of the transistor without reducingthe light receiving areas. Since the driving force of a transistor isproportional to the gate width, there is an issue that a narrow gatewidth results in insufficient driving force of the transistor. Theinsufficient driving force of the transistor is not preferable becausethe optical characteristics such as sensitivity deteriorate. As theminiaturization progresses, the area per pixel decreases and thus thisissue becomes conspicuous.

The present technology has been made in view of the above-describedsituation. An object of the present technology is to improve the drivingforce of transistors in a solid-state imaging element of a pixel sharingtype.

Solution to Problems

The present technology has been made to solve the above-described issue.The first aspect of the present technology is a solid-state imagingelement including: a first electric charge accumulating section and asecond electric charge accumulating section arranged in a predetermineddirection; a plurality of first photoelectric conversion elements; afirst transfer section configured to transfer electric charge from theplurality of first photoelectric conversion elements to the firstelectric charge accumulating section and cause the first electric chargeaccumulating section to accumulate the electric charge; a plurality ofsecond photoelectric conversion elements; a second transfer sectionconfigured to transfer electric charge from the plurality of secondphotoelectric conversion elements to the second electric chargeaccumulating section and cause the second electric charge accumulatingsection to accumulate the electric charge; a first transistor configuredto output a signal corresponding to an amount of the electric chargeaccumulated in each of the first electric charge accumulating sectionand the second electric charge accumulating section; and a secondtransistor arranged with the first transistor in the predetermineddirection and connected in parallel to the first transistor.Accordingly, there is an effect that the driving force of thetransistors connected in parallel is improved.

Further, in the first aspect, each of the first electric chargeaccumulating section and the second electric charge accumulating sectionmay be configured to generate a voltage corresponding to the amount ofthe accumulated electric charge, and each of the first transistor andthe second transistor may include an amplification transistor configuredto amplify the voltage and output the voltage as the signal.Accordingly, there is an effect that the driving force of theamplification transistors is improved.

Further, in the first aspect, a selection transistor and a resettransistor arranged in the predetermined direction may be furtherincluded. The selection transistor may be configured to, according to apredetermined selection signal, open and close a path between: the firsttransistor and the second transistor; and a predetermined signal line,and the reset transistor may be configured to initialize the firstelectric charge accumulating section and the second electric chargeaccumulating section. Accordingly, there is an effect that blockssharing the electric charge accumulating sections are symmetrical toeach other.

Further, in the first aspect, a third transistor and a fourth transistorarranged in the predetermined direction may be further included. Thethird transistor may include a selection transistor configured to openand close a path between the first transistor and a predetermined signalline according to a predetermined selection signal, and the fourthtransistor may include a selection transistor configured to open andclose a path between the third transistor and the predetermined signalline according to the predetermined selection signal. Accordingly, thereis an effect that the driving force of the selection transistors isimproved.

Further, in the first aspect, a reset transistor and a dummy transistorarranged in the predetermined direction may be further included. Thereset transistor may be configured to initialize the first electriccharge accumulating section and the second electric charge accumulatingsection. Accordingly, there is an effect that the blocks sharing theelectric charge accumulating sections are symmetrical to each other.

Further, in the first aspect, a reset transistor and a fifth transistorarranged in the predetermined direction may be further included. Thereset transistor may be configured to initialize the first electriccharge accumulating section and the second electric charge accumulatingsection. Accordingly, there is an effect that the blocks sharing theelectric charge accumulating sections are symmetrical to each other.

Further, in the first aspect, the fifth transistor may include anamplification transistor connected in parallel to the first transistorand the second transistor. Accordingly, there is an effect that thedriving force of the amplification transistors is improved.

Further, in the first aspect, the fifth transistor may include aselection transistor connected in parallel to one of the thirdtransistor and the fourth transistor. Accordingly, there is an effectthat the driving force of the selection transistors is improved.

Further, in the first aspect, an amplification transistor and a resettransistor arranged in the predetermined direction may be furtherincluded. Each of the first transistor and the second transistor mayinclude a selection transistor configured to open and close a pathbetween a third transistor and a predetermined signal line according toa predetermined selection signal, each of the first electric chargeaccumulating section and the second electric charge accumulating sectionmay be configured to generate a voltage corresponding to the amount ofthe accumulated electric charge, the amplification transistor may beconfigured to amplify the voltage and output the voltage as the signal,and the reset transistor may be configured to initialize the firstelectric charge accumulating section and the second electric chargeaccumulating section. Accordingly, there is an effect that the drivingforce of the selection transistors is improved.

Further, in the first aspect, another transistor different from thefirst transistor and the second transistor may be further included. Theanother transistor and one of the first transistor and the secondtransistor may be arranged in a direction perpendicular to thepredetermined direction. Accordingly, there is an effect that the sizeof a pixel array section in the direction perpendicular to thepredetermined direction is reduced.

Further, in the first aspect, another transistor different from thefirst transistor and the second transistor may be further included. Thefirst transistor, the second transistor, and the another transistor maybe arranged in the predetermined direction. Accordingly, there is aneffect that the size of the pixel array section in the predetermineddirection is reduced.

Further, in the first aspect, a wiring layer in which a signal lineconnected to the first transistor and the second transistor is wiredalong the predetermined direction may be further included. Accordingly,there is an effect that the number of wires is reduced.

Further, a second aspect of the present technology is an imagingapparatus including: a first electric charge accumulating section and asecond electric charge accumulating section arranged in a predetermineddirection; a plurality of first photoelectric conversion elements; afirst transfer section configured to transfer electric charge from theplurality of first photoelectric conversion elements to the firstelectric charge accumulating section and cause the first electric chargeaccumulating section to accumulate the electric charge; a plurality ofsecond photoelectric conversion elements; a second transfer sectionconfigured to transfer electric charge from the plurality of secondphotoelectric conversion elements to the second electric chargeaccumulating section and cause the second electric charge accumulatingsection to accumulate the electric charge; a first transistor configuredto output a signal corresponding to an amount of the electric chargeaccumulated in each of the first electric charge accumulating sectionand the second electric charge accumulating section; a second transistorarranged with the first transistor in the predetermined direction andconnected in parallel to the first transistor; and a signal processingsection configured to perform predetermined processing on the signal.Accordingly, there is an effect that image data whose image quality hasbeen improved by the driving force of the transistors is processed.

Advantageous Effect of Invention

The present technology can provide an excellent effect that the drivingforce of transistors can be improved in a solid-state imaging element ofa pixel sharing type. It is to be noted that the effects describedherein are not necessarily limitative, and any of the effects describedin the present disclosure may be provided.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram depicting an example of a configuration of animaging apparatus according to a first embodiment of the presenttechnology.

FIG. 2 is a block diagram depicting an example of a configuration of asolid-state imaging element according to the first embodiment of thepresent technology.

FIG. 3 is a plan view depicting an example of a layout of elements in aTr sharing block according to the first embodiment of the presenttechnology.

FIG. 4 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block according to the first embodiment of thepresent technology.

FIG. 5 is a plan view depicting an example of a layout of elements in aTr sharing block in a comparative example.

FIG. 6 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block in the comparative example.

FIG. 7 is a diagram depicting an example of a cross-sectional view ofthe solid-state imaging element according to the first embodiment of thepresent technology.

FIG. 8 is a plan view depicting an example of a transistor layeraccording to the first embodiment of the present technology.

FIG. 9 is a plan view depicting an example of a wiring layout of a firstwiring layer according to the first embodiment of the presenttechnology.

FIG. 10 is a plan view depicting an example of a wiring layout of asecond wiring layer according to the first embodiment of the presenttechnology.

FIG. 11 is a plan view depicting an example of a wiring layout of athird wiring layer according to the first embodiment of the presenttechnology.

FIG. 12 is a plan view depicting an example of a layout of the elementsin the Tr sharing block according to a second embodiment of the presenttechnology.

FIG. 13 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block according to the second embodiment ofthe present technology.

FIG. 14 is a plan view depicting an example of a layout of the elementsin the Tr sharing block according to a third embodiment of the presenttechnology.

FIG. 15 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block according to the third embodiment of thepresent technology.

FIG. 16 is a plan view depicting an example of a layout of the elementsin the Tr sharing block according to a fourth embodiment of the presenttechnology.

FIG. 17 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block according to the fourth embodiment ofthe present technology.

FIG. 18 is a plan view depicting an example of a layout of the elementsin the Tr sharing block according to a fifth embodiment of the presenttechnology.

FIG. 19 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block according to the fifth embodiment of thepresent technology.

FIG. 20 is a plan view depicting an example of a layout of the elementsin the Tr sharing block according to a sixth embodiment of the presenttechnology.

FIG. 21 is a plan view depicting an example of a layout of the elementsin the Tr sharing block according to a seventh embodiment of the presenttechnology.

FIG. 22 is a view depicting an example of a schematic configuration ofan endoscopic surgery system.

FIG. 23 is a block diagram depicting an example of a functionalconfiguration of a camera head and a CCU.

FIG. 24 is a block diagram depicting an example of schematicconfiguration of a vehicle control system.

FIG. 25 is a diagram of assistance in explaining an example ofinstallation positions of an outside-vehicle information detectingsection and an imaging section.

DESCRIPTION OF EMBODIMENTS

Hereinafter, modes for carrying out the present technology (hereinafterreferred to as embodiments) will be described. The description will bemade in the following order.

1. First Embodiment (an example in which two transistors connected inparallel are arranged in a vertical direction)

2. Second Embodiment (an example in which two of three amplificationtransistors connected in parallel are arranged in the verticaldirection)

3. Third Embodiment (an example in which two of three selectiontransistors connected in parallel are arranged in the verticaldirection)

4. Fourth Embodiment (an example in which the two amplificationtransistors connected in parallel are arranged in the verticaldirection)

5. Fifth Embodiment (an example in which the two selection transistorsconnected in parallel are arranged in the vertical direction)

6. Sixth Embodiment (an example in which the two selection transistorsconnected in parallel and other transistors are arranged in the verticaldirection)

7. Seventh Embodiment (an example in which the two amplificationtransistors connected in parallel and other transistors are arranged inthe vertical direction)

8. Example of Application to Endoscopic Surgery System

9. Example of Application to Mobile Body

1. First Embodiment

[Example of Configuration of Imaging Apparatus]

FIG. 1 is a block diagram depicting an example of a configuration of animaging apparatus 100 according to the first embodiment of the presenttechnology. The imaging apparatus 100 is an apparatus for imaging imagedata, and includes an optical section 110, a solid-state imaging element200, and a DSP (Digital Signal Processing) circuit 120. In addition, theimaging apparatus 100 includes a display section 130, an operationsection 140, a bus 150, a frame memory 160, a storage section 170, and apower supply section 180. In addition to a digital camera such as adigital still camera, a smartphone or a personal computer having animaging function is assumed as the imaging apparatus 100, for example.

The optical section 110 collects light from a subject and guides thelight to the solid-state imaging element 200. The solid-state imagingelement 200 generates image data by performing photoelectric conversionin synchronization with a vertical synchronization signal. Here, thevertical synchronization signal is a periodic signal having apredetermined frequency that indicates the timing of imaging. Thesolid-state imaging element 200 supplies the generated image data to theDSP circuit 120 through a signal line 209.

The DSP circuit 120 performs predetermined signal processing on theimage data from the solid-state imaging element 200. The DSP circuit 120outputs the processed image data to the frame memory 160 and the likethrough the bus 150. It is to be noted that at least a part of signalprocessing in the DSP circuit 120 may be performed in the solid-stateimaging element 200, instead of the DSP circuit 120. Further, the DSPcircuit 120 is an example of a signal processing section described inclaims.

The display section 130 displays the image data. A liquid crystal panelor an organic EL (Electro Luminescence) panel is assumed as the displaysection 130, for example. The operation section 140 generates anoperation signal according to a user operation.

The bus 150 is a common path used for the optical section 110, thesolid-state imaging element 200, the DSP circuit 120, the displaysection 130, the operation section 140, the frame memory 160, thestorage section 170, and the power supply section 180 to exchange datawith each other.

The frame memory 160 holds the image data. The storage section 170stores various types of data such as the image data. The power supplysection 180 supplies power to the solid-state imaging element 200, theDSP circuit 120, the display section 130, and the like.

[Example of Configuration of Solid-State Imaging Element]

FIG. 2 is a block diagram depicting an example of a configuration of thesolid-state imaging element 200 according to the first embodiment of thepresent technology. The solid-state imaging element 200 includes avertical driving section 210, a pixel array section 300, a systemcontrol section 220, a column processing section 230, and a horizontaldriving section 240.

In the pixel array section 300, a plurality of pixels is arranged in atwo-dimensional grid. Hereinafter, a collection of pixels arranged in apredetermined direction (for example, a horizontal direction) will bereferred to as “row,” while a collection of pixels arranged in adirection perpendicular to the row will be referred to as “column.” Thepixel array section 300 is divided into a plurality of Tr sharing blocks310. Each of the plurality of Tr sharing blocks 310 includes apredetermined number of pixels (for example, eight pixels in twocolumns×four rows). Each pixel in the corresponding Tr sharing block 310shares a transistor group.

The vertical driving section 210 drives the pixels in the pixel arraysection 300 all at once or in units of rows. The vertical drivingsection 210 includes a shift register and an address decoder, forexample. Further, pixel signals from the pixels driven by the verticaldriving section 210 are input into the column processing section 230 foreach column.

The column processing section 230 performs processing such as CDS(Correlated Double Sampling) processing and AD (Analog to Digital)conversion processing on the pixel signals for each column. The columnprocessing section 230 outputs processed pixel data to the DSP circuit120.

The horizontal driving section 240 selects a column in turns and causesthe column processing section 230 to output the pixel data for thecolumn. The horizontal driving section 240 includes a shift register, anaddress decoder, and the like, for example.

The system control section 220 controls a drive timing of each of thevertical driving section 210, the column processing section 230, and thehorizontal driving section 240. The system control section 220 includesa timing generator, for example. The system control section 220 controlsthe vertical driving section 210 and the like on the basis of varioustypes of timing signals generated by the timing generator.

It is to be noted that the vertical driving section 210, the pixel arraysection 300, the system control section 220, the column processingsection 230, and the horizontal driving section 240 may be provided onthe same semiconductor substrate or may be dispersedly arranged on aplurality of stacked semiconductor substrates.

[Example of Configuration of Pixel Array Section]

FIG. 3 is a plan view depicting an example of a layout of elements inthe Tr sharing block 310 according to the first embodiment of thepresent technology. The Tr sharing block 310 includes an FD sharingblock 320 and an FD sharing block 350. In the FD sharing block 320,photodiodes 321, 322, 326, and 329, an FD 325, and a transistor groupare arranged. The transistor group in the FD sharing block 320 includestransfer transistors 323, 324, 327, and 328, a selection transistor 330,an amplification transistor 331, and a dummy transistor 332.

Further, in the FD sharing block 350, photodiodes 351, 352, 356, and359, an FD 355, and a transistor group are arranged. The transistorgroup in the FD sharing block 350 includes transfer transistors 353,354, 357, and 358, a selection transistor 360, an amplificationtransistor 361, and a reset transistor 362.

Here, in the pixel array section 300, the number of rows is assumed tobe N, the number of columns is assumed to be M (N and M are integers),the horizontal direction (row direction) is assumed to be an Xdirection, and the vertical direction (column direction) is assumed tobe a Y direction. Further, an optical axis direction perpendicular tothe X direction and the Y direction is assumed to be a Z direction.Moreover, the coordinates of a photodiode in the n-th row and the m-thcolumn in the pixel array section 300 are represented by (n, m). Here, nis an integer from 0 to N−1, while m is an integer from 0 to M−1.

First, the layout of the elements in the Tr sharing block 310 will bedescribed. The photodiodes 321, 322, 326, 329, 351, 352, 356, and 359are arranged in two columns×four rows. The coordinates of thephotodiodes 321, 322, 326, and 329 are, for example, (0, 0), (0, 1), (1,0), and (1, 1), respectively. The coordinates of the photodiodes 351,352, 356, and 359 are, for example, (2, 0), (2, 1), (3, 0), and (3, 1),respectively.

The FD 325 is arranged at a position surrounded by the photodiodes 321,322, 326, and 329. The FD 355 is arranged at a position surrounded bythe photodiodes 351, 352, 356, and 359. In other words, the FDs 325 and355 are arranged in the Y direction. It is to be noted that the Ydirection is an example of a predetermined direction described inclaims.

The transfer transistor 323 is arranged between the photodiode 321 andthe FD 325. The transfer transistor 324 is arranged between thephotodiode 322 and the FD 325. The transfer transistor 327 is arrangedbetween the photodiode 326 and the FD 325. The transfer transistor 328is arranged between the photodiode 329 and the FD 325.

Further, the transfer transistor 353 is arranged between the photodiode351 and the FD 355. The transfer transistor 354 is arranged between thephotodiode 352 and the FD 355. The transfer transistor 357 is arrangedbetween the photodiode 356 and the FD 355. The transfer transistor 358is arranged between the photodiode 359 and the FD 355.

The selection transistor 330 is arranged between the photodiode 326 andthe photodiode 351. The selection transistor 360 is arranged between thephotodiode 356 at the coordinates (3, 0) and a photodiode (not depicted)at the coordinates (4, 0) in the next row. In other words, the selectiontransistors 330 and 360 are arranged in the Y direction. Further, theselection transistors 330 and 360 are connected in parallel.

The dummy transistor 332 is arranged between the photodiode 329 and thephotodiode 352. The reset transistor 362 is arranged between thephotodiode 359 at the coordinates (3, 1) and a photodiode (not depicted)at the coordinates (4, 1) in the next row. In other words, the dummytransistor 332 and the reset transistor 362 are arranged in the Ydirection.

The amplification transistor 331 is arranged between the selectiontransistor 330 and the dummy transistor 332. The amplificationtransistor 361 is arranged between the selection transistor 360 and thereset transistor 362. In other words, the amplification transistors 331and 361 are arranged in the Y direction. Further, the selectiontransistor 330, the amplification transistor 331, and the dummytransistor 332 are arranged in the X direction. The selection transistor360, the amplification transistor 361, and the reset transistor 362 arealso arranged in the X direction.

Next, functions of the elements in the Tr sharing block 310 will bedescribed. The photodiodes 321, 322, 326, 329, 351, 352, 356, and 359generate electric charge by photoelectrically converting incident light.It is to be noted that the photodiodes 321, 322, 326, and 329 areexamples of first photoelectric conversion elements described in claims,while the photodiodes 351, 352, 356, and 359 are examples of secondphotoelectric conversion elements described in claims.

The transfer transistor 323 transfers electric charge from thephotodiode 321 to the FD 325 according to a transfer signal from thevertical driving section 210. Similarly, the transfer transistors 324,327, and 328 respectively transfer electric charge from the photodiodes322, 326, and 329 to the FD 325 according to respective transfersignals. Further, the transfer transistors 353, 354, 357, and 358respectively transfer electric charge from the photodiodes 351, 352,356, and 359 to the FD 355 according to respective transfer signals.

It is to be noted that a circuit including the transfer transistors 323,324, 327, and 328 is an example of a first transfer section described inclaims, while a circuit including the transfer transistors 353, 354,357, and 358 is an example of a second transfer section described inclaims.

Each of the FDs 325 and 355 accumulates the transferred electric chargeand generates a voltage corresponding to the amount of accumulatedelectric charge. It is to be noted that the FD 325 is an example of afirst electric charge accumulating section described in claims, whilethe FD 355 is an example of a second electric charge accumulatingsection described in claims.

The amplification transistor 331 amplifies the voltage of each of theFDs 325 and 355. The amplification transistor 331 outputs a pixel signalhaving the amplified voltage to the selection transistor 330. Theamplification transistor 361 amplifies the voltage of each of the FDs325 and 355. The amplification transistor 361 outputs a pixel signalhaving the amplified voltage to the selection transistor 360. It is tobe noted that the amplification transistor 331 is an example of a firsttransistor described in claims. Further, the amplification transistor361 is an example of a second transistor described in claims.

The selection transistor 330 opens and closes a path between theamplification transistor 331 and a vertical signal line (not depicted)according to a selection signal from the vertical driving section 210.The pixel signal is output to the column processing section 230 throughthe vertical signal line. The selection transistor 360 opens and closesa path between the amplification transistor 361 and the vertical signalline (not depicted) according to the selection signal. It is to be notedthat the selection transistor 330 is an example of a third transistordescribed in claims. Further, the selection transistor 360 is an exampleof a fourth transistor described in claims.

The reset transistor 362 extracts electric charge from the FDs 325 and355 according to a reset signal from the vertical driving section 210,and initializes the amount of electric charge in the FDs 325 and 355.

The dummy transistor 332 is a transistor arranged in order to make theFD sharing block 320 and the FD sharing block 350 symmetrical to eachother. The dummy transistor 332 may be driven or may just be arrangedwithout being driven.

As described above, the selection transistor 330, the amplificationtransistor 331, and the dummy transistor 332 are arranged at the samerelative positions as the selection transistor 360, the amplificationtransistor 361, and the reset transistor 362, respectively, in theirrespective FD sharing blocks. With this arrangement, the FD sharingblock 320 and the FD sharing block 350 can be symmetrical to each other.This arrangement can reduce the influence caused by variation from pixelto pixel in the density of the polysilicon of the transistors andimprove photo response non-uniformity (PRNU). Here, “symmetry” meansthat the arrangement layouts of the elements such as the transistors andthe FDs have translational symmetry or line symmetry. In the example inFIG. 3 , with the FD sharing block 320 translated toward the FD sharingblock 350 along the Y direction, the layout of the FD sharing block 320and the layout of the FD sharing block 350 become the same, that is,translationally symmetrical. It is to be noted that the FD sharing block320 may be line symmetrical to the FD sharing block 350, as will bedescribed later.

Here, if the transistors are arranged such that the FD sharing blocksare asymmetrical to each other, the sensitivity becomes different frompixel to pixel. For example, the following reason can be considered asthe cause of the difference.

Of the light irradiated from a back surface, light passing through thevicinity of a gate, which includes, for example, polysilicon, of a MOStransistor is reflected and absorbed by an interface between the gateand silicon, a side wall of the gate, or the like. Therefore, the outputis different between a photodiode with the gate of the MOS transistorarranged on the periphery thereof and a photodiode with the gate of theMOS transistor not arranged on the periphery thereof. This results in anoutput difference between these photodiodes.

Further, electrons generated by photoelectric conversion in a photodioderegion close to a source and a drain of the MOS transistor are likely tomove to the source and the drain having a relatively deeper potentialthan the potential of the photodiode. In this case, the electrons aredifficult to be detected and the output becomes small in the photodiodewith the source and the drain of the MOS transistor arranged on theperiphery thereof. Therefore, the output is different between thephotodiode with the source and the drain of the MOS transistor arrangedon the periphery thereof and the photodiode with the source and thedrain of the MOS transistor not arranged on the periphery thereof. Thisresults in an output difference between these photodiodes.

FIG. 4 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block 310 according to the first embodiment ofthe present technology. For example, n-type MOS(Metal-Oxide-Semiconductor) transistors are used as the transfertransistors 323, 324, 327, 328, 353, 354, 357, and 358. Similarly, forexample, n-type MOS transistors are also used as the reset transistor362, the amplification transistors 331 and 361, and the selectiontransistors 330 and 360.

Each gate of the transfer transistors 323, 324, 327, and 328 isconnected to the vertical driving section 210. Further, sources anddrains of these transistors are connected to the respective photodiodesand the FD 325. Further, each gate of the transfer transistors 353, 354,357, and 358 is connected to the vertical driving section 210. Further,sources and drains of these transistors are connected to the respectivephotodiodes and the FD 355.

A gate of the reset transistor 362 is connected to the vertical drivingsection 210. A source of the reset transistor 362 is connected to apower supply, while a drain thereof is connected to the FDs 325 and 355.

Gates of the amplification transistors 331 and 361 are commonlyconnected to the FDs 325 and 355. Further, a source of the amplificationtransistor 331 is connected to the power supply, while a drain thereofis connected to the selection transistor 330. A source of theamplification transistor 361 is connected to the power supply, while adrain thereof is connected to the selection transistor 360. In otherwords, the amplification transistors 331 and 361 are connected inparallel to the power supply.

Gates of the selection transistors 330 and 360 are commonly connected tothe vertical driving section 210. Further, a source of the selectiontransistor 330 is connected to the amplification transistor 331, while adrain thereof is connected to a vertical signal line 319. A source ofthe selection transistor 360 is connected to the amplificationtransistor 361, while a drain thereof is connected to the verticalsignal line 319. In other words, the selection transistors 330 and 360are connected in parallel to the vertical signal line. A pixel signalSIG is output to the column processing section 230 through this verticalsignal line.

The vertical driving section 210 initializes the FDs 325 and 355 bysupplying a reset signal RST. Further, the vertical driving section 210supplies transfer signals TG00, TG01, TG10, TG11, TG20, TG21, TG30, andTG31 to the transfer transistors 323, 324, 327, 328, 353, 354, 357, and358, respectively, to cause the transfer transistors 323, 324, 327, 328,353, 354, 357, and 358 to transfer electric charge. In a case wherepixel addition is not performed, the vertical driving section 210sequentially supplies the transfer signals TG00, TG01, TG10, TG11, TG20,TG21, TG30, and TG31 at the end of exposure. On the other hand, in acase where pixel addition is performed, the vertical driving section 210simultaneously supplies at least two of the transfer signals TG00, TG01,TG10, TG11, TG20, TG21, TG30, or TG31. Further, the vertical drivingsection 210 supplies a selection signal SEL to the selection transistors330 and 360 to cause the selection transistors 330 and 360 to output thepixel signals to the vertical signal line 319.

FIG. 5 is a plan view depicting an example of a layout of elements in aTr sharing block in a comparative example. In this comparative example,one selection transistor and one amplification transistor are provided.The selection transistor is arranged between a photodiode at thecoordinates (1, 0) and a photodiode at the coordinates (2, 0). A resettransistor is arranged between a photodiode at the coordinates (3, 0)and a photodiode (not depicted) at the coordinates (4, 0). Theamplification transistor is arranged between a photodiode at thecoordinates (1, 1) and a photodiode at the coordinates (2, 1). A dummytransistor is arranged between a photodiode at the coordinates (3, 1)and a photodiode (not depicted) at the coordinates (4, 1).

FIG. 6 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block in the comparative example. A gate ofthe amplification transistor is connected to the FDs. The amplificationtransistor and the selection transistor are connected in series betweena power supply and a vertical signal line. A drain current Isf of theamplification transistor in this comparative example is represented bythe following formula, for example.Isf=K·(W/L)·(Vin−V2−Vth)²  Formula 1In the above-described formula, K represents the product of the mobilityof the amplification transistor and the gate capacitance. W representsthe gate width. L represents the gate length of the amplificationtransistor. Vin represents a gate voltage of the amplificationtransistor. V2 represents a voltage at a connection point between theamplification transistor and the selection transistor. The unit of thedrain current Isf is, for example, an ampere (A). The unit of the gatelength L and the gate width W is, for example, a meter (m). The unit ofthe voltages Vin, V2, and Vth is, for example, a volt (V).

Next, assume a configuration in which two amplification transistors 331are included in the comparative example and one of the two amplificationtransistors 331 is connected in parallel to one selection transistor. Adrain current Isf′ of the amplification transistor in this configurationis represented by the following formula, for example.Isf′=K·(2W/L)·(Vin−V2′−Vth′)²  Formula 2

V2′ in the above-described formula represents a voltage between theamplification transistor and the selection transistor. Vth′ is athreshold voltage of the amplification transistor.

According to the formulas 1 and 2, in a case where V2 and Vth areassumed to be equal to V2′ and Vth′, respectively, the parallelconnection of the amplification transistors makes it possible to obtainthe same drain current as the drain current to be obtained in a casewhere the gate width W of the amplification transistor is doubled.

Further, in a case where Isf and Vth are assumed to be equal to Isf′ andVth′, respectively, the voltage V2′ becomes larger than the voltage V2according to the formulas 1 and 2. This means that the parallelconnection increases the mutual conductance of the amplificationtransistors, reducing the on-resistance thereof.

As described above, the parallel connection of the amplificationtransistors can increase the mutual conductance of these transistors andincrease the drain current, as compared with a case where parallelconnection is not employed. This applies similarly to the selectiontransistor and the parallel connection can increase the drain current.Further, an increase in the mutual conductance can increase theprocessing speed.

A similar effect can also be obtained in a case where the gate width Wof the amplification transistor is doubled without connecting theamplification transistors in parallel. However, in order to secure thedoubled gate width W, there is a possibility that the light receivingareas of the photodiodes need to be reduced. Moreover, a reduction inthe light receiving areas results in a reduction in the opticalcharacteristics such as sensitivity.

By contrast, the amplification transistors 331 and 361 are connected inparallel in the solid-state imaging element 200. While the lightreceiving areas are maintained, this arrangement can attain asubstantially increased gate width W of the amplification transistor, ascompared with a case where parallel connection is not employed. Further,the selection transistors 330 and 360 are connected in parallel. Thisarrangement can also attain a substantially increased gate width W ofthe selection transistor.

Further, the amplification transistors 331 and 361 connected in parallelare arranged in the Y direction in the Tr sharing block 310. Similarly,the selection transistors 330 and 360 are also arranged in the Ydirection. The arrangement in the Y direction facilitates wiring ofsignal lines, as compared with the arrangement in the X direction. Thewiring layout will be described later.

FIG. 7 is a diagram depicting an example of a cross-sectional view ofthe solid-state imaging element 200 according to the first embodiment ofthe present technology viewed from the Y direction. With alight-receiving surface of a photoelectric conversion layer 410 servingas an upper surface, a transistor layer 420 is provided below thephotoelectric conversion layer 410. Further, a first wiring layer 430 isprovided below the transistor layer 420, and a second wiring layer 440is provided below the first wiring layer 430. A third wiring layer 460is provided below the second wiring layer 440.

In the photoelectric conversion layer 410, the photodiodes 321 and 322are arranged in a two-dimensional grid. In the transistor layer 420, thetransistors such as the amplification transistors 331 and 361 and theselection transistors 330 and 360 are provided. In the first wiringlayer 430, signal lines are wired along the Y direction (verticaldirection). In the second wiring layer 440, signal lines are wired alongthe X direction (horizontal direction). In the third wiring layer 460,signal lines are wired along the Y direction.

FIG. 8 is a plan view depicting an example of the transistor layer 420according to the first embodiment of the present technology. In a regioncorresponding to the Tr sharing block 310 in the transistor layer 420,the eight transfer transistors, the selection transistors 330 and 360,the amplification transistors 331 and 361, the dummy transistor 332, andthe reset transistor 362 are provided.

[Example of Configuration of Wiring Layer]

FIG. 9 is a plan view depicting an example of a wiring layout of thefirst wiring layer 430 according to the first embodiment of the presenttechnology. In the first wiring layer 430, signal lines such as signallines 431, 432, 433, and 434 are wired along the Y direction.

The signal line 431 is connected to the selection transistors 330 and360 and transmits the selection signal SEL to the selection transistors330 and 360. The signal line 432 is connected to the transfertransistors 323 and 327 and transmits the transfer signals TG00 and TG10to the transfer transistors 323 and 327, respectively.

The signal line 433 is connected to the amplification transistors 331and 361 and is used to supply power to the amplification transistors 331and 361. The signal line 434 is connected to the reset transistor 362and transmits the reset signal RST to the reset transistor 362.

FIG. 10 is a plan view depicting an example of a wiring layout of thesecond wiring layer 440 according to the first embodiment of the presenttechnology. In the second wiring layer 440, signal lines such as signallines 441, 442, 443, 444, 445, 446, 447, 448, 449, and 450 are wiredalong the X direction.

The signal lines 441, 443, 446, and 448 are used to supply a powersupply voltage VSS. The signal line 442 is connected to the signal line432 and transmits the transfer signals TG from the vertical drivingsection 210 to the signal line 432. Similarly, the signal line 447transmits the transfer signals TG.

The signal line 444 is connected to the signal line 431 and transmitsthe selection signal SEL from the vertical driving section 210 to thesignal line 431. The signal lines 445 and 450 are used to supply a powersupply voltage VDD.

The signal line 449 is connected to the signal line 434 and transmitsthe reset signal RST from the vertical driving section 210 to the signalline 434.

As described above, since the selection transistors 330 and 360 arearranged in the Y direction, the selection signal SEL can be transmittedthrough the single signal line 431 wired along the Y direction. Here, ifthe selection transistors 330 and 360 are arranged in the X direction,the selection signal SEL needs to be transmitted through two signallines connected to the signal line 444 in the first wiring layer 430,and this results in an increase in the number of wires. By contrast, theselection transistors 330 and 360 are arranged in the Y direction in theTr sharing block 310. This allows a reduction in the number of wires inthe first wiring layer 430 and facilitating wiring, as compared with acase where the selection transistors 330 and 360 are arranged in the Xdirection.

FIG. 11 is a plan view depicting an example of a wiring layout of thethird wiring layer 460 according to the first embodiment of the presenttechnology. In the third wiring layer 460, signal lines such as signallines 461, 462, 463, 464, and 465 are wired along the Y direction.

The signal lines 461 and 465 are used to supply the power supply voltageVDD. The signal lines 462 and 464 are used to supply the power supplyvoltage VSS. The signal line 463 transmits the pixel signal SIG. Thesignal line 463 in FIG. 11 corresponds to the vertical signal line 319in the equivalent circuit depicted as an example in FIG. 4 .

According to the first embodiment of the present technology, asdescribed above, the amplification transistors 331 and 361 are connectedin parallel and arranged in the Y direction. This arrangement can easilyattain an increased driving force of the amplification transistor, ascompared with a case where parallel connection is not employed. Further,the selection transistors 330 and 360 are also connected in parallel.This arrangement can also attain an increased driving force of theselection transistor.

2. Second Embodiment

In the first embodiment described above, the two amplificationtransistors 331 and 361 are connected in parallel in the solid-stateimaging element 200. Accordingly, the gate width W of the amplificationtransistors can be substantially twice as large as a case where parallelconnection is not employed. However, even with the doubled gate width W,the driving force of the amplification transistors may be insufficientin some cases. The solid-state imaging element 200 according to thesecond embodiment is different from the solid-state imaging element 200according to the first embodiment in that the driving force of theamplification transistors is further improved.

FIG. 12 is a plan view depicting an example of a layout of the elementsin the Tr sharing block 310 according to the second embodiment of thepresent technology. The Tr sharing block 310 according to the secondembodiment is different from the Tr sharing block 310 according to thefirst embodiment in that an amplification transistor 333 is providedinstead of the dummy transistor 332. Further, the amplificationtransistors 331, 361, and 333 are connected in parallel.

FIG. 13 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block 310 according to the second embodimentof the present technology. The equivalent circuit according to thesecond embodiment is different from the equivalent circuit according tothe first embodiment in that the amplification transistor 333 is furtherconnected.

Sources of the amplification transistors 331, 361, and 333 are commonlyconnected to the power supply. Further, drains of the amplificationtransistors 331 and 333 are commonly connected to the selectiontransistor 330. It is to be noted that the amplification transistor 333is an example of a fifth transistor described in claims.

The three amplification transistors are connected in parallel.Accordingly, the gate width W of the amplification transistors can besubstantially three times as large as a case where parallel connectionis not employed. As a result, the drain current can be tripled and thedriving force of the amplification transistors can be further improved.

In the second embodiment of the present technology, as described above,since the three amplification transistors 331, 361, and 333 areconnected in parallel, the driving force of the amplificationtransistors can be further improved, as compared with a case where thetwo amplification transistors are connected in parallel.

3. Third Embodiment

In the first embodiment described above, the two selection transistors330 and 360 are connected in parallel in the solid-state imaging element200. Accordingly, the gate width W of the selection transistors can besubstantially twice as large as a case where parallel connection is notemployed. However, even with the doubled gate width W, the driving forceof the selection transistors may be insufficient in some cases. Thesolid-state imaging element 200 according to the third embodiment isdifferent from the solid-state imaging element 200 according to thefirst embodiment in that the driving force of the selection transistorsis further improved.

FIG. 14 is a plan view depicting an example of a layout of the elementsin the Tr sharing block 310 according to the third embodiment of thepresent technology. The Tr sharing block 310 according to the thirdembodiment is different from the Tr sharing block 310 according to thefirst embodiment in that a selection transistor 334 is provided insteadof the dummy transistor 332. Further, the selection transistors 330,360, and 334 are connected in parallel.

FIG. 15 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block 310 according to the third embodiment ofthe present technology. The equivalent circuit according to the thirdembodiment is different from the equivalent circuit according to thefirst embodiment in that the selection transistor 334 is furtherconnected.

Gates of the selection transistors 330, 360, and 334 are commonlyconnected to the signal line that transmits the selection signal SEL,while drains thereof are commonly connected to the vertical signal line319. Further, sources of the selection transistors 330 and 334 arecommonly connected to the amplification transistor 331. It is to benoted that the selection transistor 334 is an example of the fifthtransistor described in claims.

The three selection transistors are connected in parallel. Accordingly,the gate width W of the selection transistors can be substantially threetimes as large as a case where parallel connection is not employed. As aresult, the drain current can be tripled and the driving force of theselection transistors can be further improved.

In the third embodiment of the present technology, as described above,since the three selection transistors 330, 360, and 334 are connected inparallel, the driving force of the selection transistors can be furtherimproved, as compared with a case where the two selection transistorsare connected in parallel.

4. Fourth Embodiment

In the first embodiment described above, the two selection transistors330 and 360 are connected in parallel. Accordingly, the gate width W ofthe selection transistors can be substantially twice as large as a casewhere parallel connection is not employed. However, an increase in thenumber of transistors in the Tr sharing block 310 makes it difficult toincrease the light receiving areas of the photodiodes. The solid-stateimaging element 200 according to the fourth embodiment is different fromthe solid-state imaging element 200 according to the first embodiment inthat the number of selection transistors is reduced.

FIG. 16 is a plan view depicting an example of a layout of the elementsin the Tr sharing block 310 according to the fourth embodiment of thepresent technology. The Tr sharing block 310 according to the fourthembodiment is different from the Tr sharing block 310 according to thefirst embodiment in that the selection transistor 360 and the dummytransistor 332 are not provided. Since the FD sharing blocks 320 and 350with these transistors reduced are symmetrical to each other, theoptical characteristics such as PRNU can be improved. Further, in thefourth embodiment, the amplification transistor 331 is arranged betweenthe photodiode 326 and the photodiode 351. The selection transistor 330is arranged between the photodiode 329 and the photodiode 352. Theamplification transistor 361 is arranged between the photodiode 356 atthe coordinates (3, 0) and the photodiode (not depicted) at thecoordinates (4, 0) in the next row. The position of the reset transistor362 according to the fourth embodiment is similar to the position of thereset transistor 362 according to the first embodiment.

FIG. 17 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block 310 according to the fourth embodimentof the present technology. The equivalent circuit according to thefourth embodiment is different from the equivalent circuit according toof the first embodiment in that the selection transistor 360 is notconnected. Further, the drain of the amplification transistor 361 isconnected to the selection transistor 330.

In the fourth embodiment of the present technology, as described above,since the FD sharing blocks 320 and 360 are symmetrical to each otherwithout using the selection transistor 360 and the dummy transistor 332,the optical characteristics such as PRNU can be improved.

5. Fifth Embodiment

In the first embodiment described above, the two amplificationtransistors 331 and 361 are connected in parallel. Accordingly, the gatewidth W of the amplification transistors can be substantially twice aslarge as a case where parallel connection is not employed. However, anincrease in the number of transistors in the Tr sharing block 310 makesit difficult to increase the light receiving areas of the photodiodes.The solid-state imaging element 200 according to the fifth embodiment isdifferent from the solid-state imaging element 200 according to thefirst embodiment in that the number of amplification transistors isreduced.

FIG. 18 is a plan view depicting an example of a layout of the elementsin the Tr sharing block 310 according to the fifth embodiment of thepresent technology. The Tr sharing block 310 according to the fifthembodiment is different from the Tr sharing block 310 according to thefirst embodiment in that the amplification transistor 361 and the dummytransistor 332 are not provided. Since the FD sharing blocks 320 and 350with these transistors reduced are symmetrical to each other, theoptical characteristics such as PRNU can be improved.

Further, in the fifth embodiment, the amplification transistor 331 isarranged between the photodiode 326 and the photodiode 351. Theselection transistor 330 is arranged between the photodiode 329 and thephotodiode 352. The reset transistor 362 is arranged between thephotodiode 356 at the coordinates (3, 0) and the photodiode (notdepicted) at the coordinates (4, 0) in the next row. The selectiontransistor 360 is arranged between the photodiode 359 at the coordinates(3, 1) and the photodiode (not depicted) at the coordinates (4, 1) inthe next row.

It is to be noted that the selection transistor 330 is an example of thefirst transistor described in claims, while the selection transistor 360is an example of the second transistor described in claims.

FIG. 19 is a circuit diagram depicting an example of an equivalentcircuit of the Tr sharing block 310 according to the fifth embodiment ofthe present technology. The equivalent circuit according to the fifthembodiment is different from the equivalent circuit according to thefirst embodiment in that the amplification transistor 361 is notconnected. Further, the source of the selection transistor 360 isconnected to the amplification transistor 331.

In the fifth embodiment of the present technology, as described above,since the FD sharing blocks 320 and 360 are symmetrical to each otherwithout using the amplification transistor 361 and the dummy transistor332, the optical characteristics such as PRNU can be improved.

6. Sixth Embodiment

In the first embodiment described above, the transistors such as theselection transistor 330 are arranged in the X direction in the Trsharing block 310. With this arrangement, however, the pixel arraysection 300 in the Y direction is large in size, as compared with a casewhere these transistors are arranged in the Y direction. Further, theparallel connection of the selection transistors 330 and 360 increasesthe number of transistors in the Tr sharing block 310, which makes itdifficult to increase the light receiving areas of the photodiodes. Thesolid-state imaging element 200 according to the sixth embodiment isdifferent from the solid-state imaging element 200 according to thefirst embodiment in that the size in the Y direction and the number ofselection transistors are reduced.

FIG. 20 is a plan view depicting an example of a layout of the elementsin the Tr sharing block 310 according to the sixth embodiment of thepresent technology. The Tr sharing block 310 according to the sixthembodiment is different from the Tr sharing block 310 according to thefirst embodiment in that the selection transistor 360 and the dummytransistor 332 are not provided. Since the FD sharing blocks 320 and 350with these transistors reduced are symmetrical to each other, theoptical characteristics such as PRNU can be improved.

Further, the selection transistor 330, the amplification transistor 331,the amplification transistor 361, and the reset transistor 362 arearranged in the Y direction. The selection transistor 330 is arranged ata position adjacent to the photodiode 322. The amplification transistor331 is arranged at a position adjacent to the photodiode 329. Theamplification transistor 361 is arranged at a position adjacent to thephotodiode 352. The reset transistor 362 is arranged at a positionadjacent to the photodiode 359. With the arrangement described above,the FD sharing block 320 and the FD sharing block 350 are linesymmetrical to each other with respect to a boundary line between theseblocks. It is to be noted that each of the selection transistor 330 andthe reset transistor 362 is an example of another transistor describedin claims.

An equivalent circuit of the Tr sharing block 310 according to the sixthembodiment is similar to the equivalent circuit according to the fourthembodiment depicted as an example in FIG. 17 .

In the sixth embodiment of the present technology, as described above,since the selection transistor 330, the amplification transistor 331,the amplification transistor 361, and the reset transistor 362 arearranged in the Y direction, the size in the Y direction can be reduced,as compared with a case where the selection transistor 330, theamplification transistor 331, the amplification transistor 361, and thereset transistor 362 are arranged in the X direction. Further, since theFD sharing blocks 320 and 360 are symmetrical to each other withoutusing the selection transistor 360 and the dummy transistor 332, theoptical characteristics such as PRNU can be improved.

7. Seventh Embodiment

In the first embodiment described above, the transistors such as theselection transistor 330 are arranged in the X direction in the Trsharing block 310. With this arrangement, however, the pixel arraysection 300 in the Y direction is large in size, as compared with a casewhere the transistors are arranged in the Y direction. Further, theparallel connection of the amplification transistors 331 and 361increases the number of transistors in the Tr sharing block 310, whichmakes it difficult to increase the light receiving areas of thephotodiodes. The solid-state imaging element 200 according to theseventh embodiment is different from the solid-state imaging element 200according to the first embodiment in that the size in the Y directionand the number of amplification transistors are reduced.

FIG. 21 is a plan view depicting an example of a layout of the elementsin the Tr sharing block 310 according to the seventh embodiment of thepresent technology. The Tr sharing block 310 according to the seventhembodiment is different from the Tr sharing block 310 according to thefirst embodiment in that the amplification transistor 361 and the dummytransistor 332 are not provided. Since the FD sharing blocks 320 and 350with these transistors reduced are symmetrical to each other, theoptical characteristics such as PRNU can be improved.

Further, the selection transistor 330, the amplification transistor 331,the selection transistor 360, and the reset transistor 362 are arrangedin the Y direction. The selection transistor 330 is arranged at aposition adjacent to the photodiode 322. The amplification transistor331 is arranged at a position adjacent to the photodiode 329. Theselection transistor 360 is arranged at a position adjacent to thephotodiode 352. The reset transistor 362 is arranged at a positionadjacent to the photodiode 359. It is to be noted that each of theamplification transistor 331 and the reset transistor 362 is an exampleof another transistor described in claims.

An equivalent circuit of the Tr sharing block 310 according to theseventh embodiment is similar to the equivalent circuit according to thefifth embodiment depicted as an example in FIG. 19 . It is to be notedthat in the first, second, and third embodiments, the transistor groupmay also be arranged in the Y direction as in the sixth and seventhembodiments.

In the seventh embodiment of the present technology, as described above,since the selection transistor 330, the amplification transistor 331,the selection transistor 360, and the reset transistor 362 are arrangedin the Y direction, the size in the Y direction can be reduced, ascompared with a case where the selection transistor 330, theamplification transistor 331, the selection transistor 360, and thereset transistor 362 are arranged in the X direction. Further, since theFD sharing blocks 320 and 360 are symmetrical to each other withoutusing the amplification transistor 361 and the dummy transistor 332, theoptical characteristics such as PRNU can be improved.

<8. Example of Application to Endoscopic Surgery System>

The technology (present technology) according to the present disclosurecan be applied to various types of products. For example, the technologyaccording to the present disclosure may be applied to an endoscopicsurgery system.

FIG. 22 is a view depicting an example of a schematic configuration ofan endoscopic surgery system to which the technology according to anembodiment of the present disclosure (present technology) can beapplied.

In FIG. 22 , a state is illustrated in which a surgeon (medical doctor)11131 is using an endoscopic surgery system 11000 to perform surgery fora patient 11132 on a patient bed 11133. As depicted, the endoscopicsurgery system 11000 includes an endoscope 11100, other surgical tools11110 such as a pneumoperitoneum tube 11111 and an energy device 11112,a supporting arm apparatus 11120 which supports the endoscope 11100thereon, and a cart 11200 on which various apparatus for endoscopicsurgery are mounted.

The endoscope 11100 includes a lens barrel 11101 having a region of apredetermined length from a distal end thereof to be inserted into abody cavity of the patient 11132, and a camera head 11102 connected to aproximal end of the lens barrel 11101. In the example depicted, theendoscope 11100 is depicted which includes as a rigid endoscope havingthe lens barrel 11101 of the hard type. However, the endoscope 11100 mayotherwise be included as a flexible endoscope having the lens barrel11101 of the flexible type.

The lens barrel 11101 has, at a distal end thereof, an opening in whichan objective lens is fitted. A light source apparatus 11203 is connectedto the endoscope 11100 such that light generated by the light sourceapparatus 11203 is introduced to a distal end of the lens barrel 11101by a light guide extending in the inside of the lens barrel 11101 and isirradiated toward an observation target in a body cavity of the patient11132 through the objective lens. It is to be noted that the endoscope11100 may be a forward-viewing endoscope or may be an oblique-viewingendoscope or a side-viewing endoscope.

An optical system and an image pickup element are provided in the insideof the camera head 11102 such that reflected light (observation light)from the observation target is condensed on the image pickup element bythe optical system. The observation light is photo-electricallyconverted by the image pickup element to generate an electric signalcorresponding to the observation light, namely, an image signalcorresponding to an observation image. The image signal is transmittedas RAW data to a CCU 11201.

The CCU 11201 includes a central processing unit (CPU), a graphicsprocessing unit (GPU) or the like and integrally controls operation ofthe endoscope 11100 and a display apparatus 11202. Further, the CCU11201 receives an image signal from the camera head 11102 and performs,for the image signal, various image processes for displaying an imagebased on the image signal such as, for example, a development process(demosaic process).

The display apparatus 11202 displays thereon an image based on an imagesignal, for which the image processes have been performed by the CCU11201, under the control of the CCU 11201.

The light source apparatus 11203 includes a light source such as, forexample, a light emitting diode (LED) and supplies irradiation lightupon imaging of a surgical region to the endoscope 11100.

An inputting apparatus 11204 is an input interface for the endoscopicsurgery system 11000. A user can perform inputting of various kinds ofinformation or instruction inputting to the endoscopic surgery system11000 through the inputting apparatus 11204. For example, the user wouldinput an instruction or a like to change an image pickup condition (typeof irradiation light, magnification, focal distance or the like) by theendoscope 11100.

A treatment tool controlling apparatus 11205 controls driving of theenergy device 11112 for cautery or incision of a tissue, sealing of ablood vessel or the like. A pneumoperitoneum apparatus 11206 feeds gasinto a body cavity of the patient 11132 through the pneumoperitoneumtube 11111 to inflate the body cavity in order to secure the field ofview of the endoscope 11100 and secure the working space for thesurgeon. A recorder 11207 is an apparatus capable of recording variouskinds of information relating to surgery. A printer 11208 is anapparatus capable of printing various kinds of information relating tosurgery in various forms such as a text, an image or a graph.

It is to be noted that the light source apparatus 11203 which suppliesirradiation light when a surgical region is to be imaged to theendoscope 11100 may include a white light source which includes, forexample, an LED, a laser light source or a combination of them. Where awhite light source includes a combination of red, green, and blue (RGB)laser light sources, since the output intensity and the output timingcan be controlled with a high degree of accuracy for each color (eachwavelength), adjustment of the white balance of a picked up image can beperformed by the light source apparatus 11203. Further, in this case, iflaser beams from the respective RGB laser light sources are irradiatedtime-divisionally on an observation target and driving of the imagepickup elements of the camera head 11102 are controlled in synchronismwith the irradiation timings. Then images individually corresponding tothe R, G and B colors can be also picked up time-divisionally. Accordingto this method, a color image can be obtained even if color filters arenot provided for the image pickup element.

Further, the light source apparatus 11203 may be controlled such thatthe intensity of light to be outputted is changed for each predeterminedtime. By controlling driving of the image pickup element of the camerahead 11102 in synchronism with the timing of the change of the intensityof light to acquire images time-divisionally and synthesizing theimages, an image of a high dynamic range free from underexposed blockedup shadows and overexposed highlights can be created.

Further, the light source apparatus 11203 may be configured to supplylight of a predetermined wavelength band ready for special lightobservation. In special light observation, for example, by utilizing thewavelength dependency of absorption of light in a body tissue toirradiate light of a narrow band in comparison with irradiation lightupon ordinary observation (namely, white light), narrow band observation(narrow band imaging) of imaging a predetermined tissue such as a bloodvessel of a superficial portion of the mucous membrane or the like in ahigh contrast is performed. Alternatively, in special light observation,fluorescent observation for obtaining an image from fluorescent lightgenerated by irradiation of excitation light may be performed. Influorescent observation, it is possible to perform observation offluorescent light from a body tissue by irradiating excitation light onthe body tissue (autofluorescence observation) or to obtain afluorescent light image by locally injecting a reagent such asindocyanine green (ICG) into a body tissue and irradiating excitationlight corresponding to a fluorescent light wavelength of the reagentupon the body tissue. The light source apparatus 11203 can be configuredto supply such narrow-band light and/or excitation light suitable forspecial light observation as described above.

FIG. 23 is a block diagram depicting an example of a functionalconfiguration of the camera head 11102 and the CCU 11201 depicted inFIG. 22 .

The camera head 11102 includes a lens unit 11401, an image pickup unit11402, a driving unit 11403, a communication unit 11404 and a camerahead controlling unit 11405. The CCU 11201 includes a communication unit11411, an image processing unit 11412 and a control unit 11413. Thecamera head 11102 and the CCU 11201 are connected for communication toeach other by a transmission cable 11400.

The lens unit 11401 is an optical system, provided at a connectinglocation to the lens barrel 11101. Observation light taken in from adistal end of the lens barrel 11101 is guided to the camera head 11102and introduced into the lens unit 11401. The lens unit 11401 includes acombination of a plurality of lenses including a zoom lens and afocusing lens.

The number of image pickup elements which is included by the imagepickup unit 11402 may be one (single-plate type) or a plural number(multi-plate type). Where the image pickup unit 11402 is configured asthat of the multi-plate type, for example, image signals correspondingto respective R, G and B are generated by the image pickup elements, andthe image signals may be synthesized to obtain a color image. The imagepickup unit 11402 may also be configured so as to have a pair of imagepickup elements for acquiring respective image signals for the right eyeand the left eye ready for three dimensional (3D) display. If 3D displayis performed, then the depth of a living body tissue in a surgicalregion can be comprehended more accurately by the surgeon 11131. It isto be noted that, where the image pickup unit 11402 is configured asthat of stereoscopic type, a plurality of systems of lens units 11401are provided corresponding to the individual image pickup elements.

Further, the image pickup unit 11402 may not necessarily be provided onthe camera head 11102. For example, the image pickup unit 11402 may beprovided immediately behind the objective lens in the inside of the lensbarrel 11101.

The driving unit 11403 includes an actuator and moves the zoom lens andthe focusing lens of the lens unit 11401 by a predetermined distancealong an optical axis under the control of the camera head controllingunit 11405. Consequently, the magnification and the focal point of apicked up image by the image pickup unit 11402 can be adjusted suitably.

The communication unit 11404 includes a communication apparatus fortransmitting and receiving various kinds of information to and from theCCU 11201. The communication unit 11404 transmits an image signalacquired from the image pickup unit 11402 as RAW data to the CCU 11201through the transmission cable 11400.

In addition, the communication unit 11404 receives a control signal forcontrolling driving of the camera head 11102 from the CCU 11201 andsupplies the control signal to the camera head controlling unit 11405.The control signal includes information relating to image pickupconditions such as, for example, information that a frame rate of apicked up image is designated, information that an exposure value uponimage picking up is designated and/or information that a magnificationand a focal point of a picked up image are designated.

It is to be noted that the image pickup conditions such as the framerate, exposure value, magnification or focal point may be designated bythe user or may be set automatically by the control unit 11413 of theCCU 11201 on the basis of an acquired image signal. In the latter case,an auto exposure (AE) function, an auto focus (AF) function and an autowhite balance (AWB) function are incorporated in the endoscope 11100.

The camera head controlling unit 11405 controls driving of the camerahead 11102 on the basis of a control signal from the CCU 11201 receivedthrough the communication unit 11404.

The communication unit 11411 includes a communication apparatus fortransmitting and receiving various kinds of information to and from thecamera head 11102. The communication unit 11411 receives an image signaltransmitted thereto from the camera head 11102 through the transmissioncable 11400.

Further, the communication unit 11411 transmits a control signal forcontrolling driving of the camera head 11102 to the camera head 11102.The image signal and the control signal can be transmitted by electricalcommunication, optical communication or the like.

The image processing unit 11412 performs various image processes for animage signal in the form of RAW data transmitted thereto from the camerahead 11102.

The control unit 11413 performs various kinds of control relating toimage picking up of a surgical region or the like by the endoscope 11100and display of a picked up image obtained by image picking up of thesurgical region or the like. For example, the control unit 11413 createsa control signal for controlling driving of the camera head 11102.

Further, the control unit 11413 controls, on the basis of an imagesignal for which image processes have been performed by the imageprocessing unit 11412, the display apparatus 11202 to display a pickedup image in which the surgical region or the like is imaged. Thereupon,the control unit 11413 may recognize various objects in the picked upimage using various image recognition technologies. For example, thecontrol unit 11413 can recognize a surgical tool such as forceps, aparticular living body region, bleeding, mist when the energy device11112 is used and so forth by detecting the shape, color and so forth ofedges of objects included in a picked up image. The control unit 11413may cause, when it controls the display apparatus 11202 to display apicked up image, various kinds of surgery supporting information to bedisplayed in an overlapping manner with an image of the surgical regionusing a result of the recognition. Where surgery supporting informationis displayed in an overlapping manner and presented to the surgeon11131, the burden on the surgeon 11131 can be reduced and the surgeon11131 can proceed with the surgery with certainty.

The transmission cable 11400 which connects the camera head 11102 andthe CCU 11201 to each other is an electric signal cable ready forcommunication of an electric signal, an optical fiber ready for opticalcommunication or a composite cable ready for both of electrical andoptical communications.

Here, while, in the example depicted, communication is performed bywired communication using the transmission cable 11400, thecommunication between the camera head 11102 and the CCU 11201 may beperformed by wireless communication.

An example of the endoscopic surgery system to which the technologyaccording to the present disclosure can be applied has been describedabove. The technology according to the present disclosure can be appliedto the image pickup unit 11402 among the configurations described above.Specifically, the solid-state imaging element 200 in FIG. 2 can beapplied to the image pickup unit 11402 in FIG. 23 . Applying thetechnology according to the present disclosure to the image pickup unit10402 can improve the driving force of the transistors and obtain aclearer image of a surgical region. Therefore, a surgeon can reliablycheck the surgical region.

It is to be noted that although the endoscopic surgery system has beendescribed as an example here, the technology according to the presentdisclosure may be additionally applied to a microscopic surgery systemor the like, for example.

<9. Example of Application to Mobile Body>

The technology (present technology) according to the present disclosurecan be applied to various types of products. For example, the technologyaccording to the present disclosure may be implemented as an apparatusto be mounted in any type of mobile body such as an automobile, anelectric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, apersonal mobility, an airplane, a drone, a ship, or a robot.

FIG. 24 is a block diagram depicting an example of schematicconfiguration of a vehicle control system as an example of a mobile bodycontrol system to which the technology according to an embodiment of thepresent disclosure can be applied.

The vehicle control system 12000 includes a plurality of electroniccontrol units connected to each other via a communication network 12001.In the example depicted in FIG. 24 , the vehicle control system 12000includes a driving system control unit 12010, a body system control unit12020, an outside-vehicle information detecting unit 12030, anin-vehicle information detecting unit 12040, and an integrated controlunit 12050. In addition, a microcomputer 12051, a sound/image outputsection 12052, and a vehicle-mounted network interface (I/F) 12053 areillustrated as a functional configuration of the integrated control unit12050.

The driving system control unit 12010 controls the operation of devicesrelated to the driving system of the vehicle in accordance with variouskinds of programs. For example, the driving system control unit 12010functions as a control device for a driving force generating device forgenerating the driving force of the vehicle, such as an internalcombustion engine, a driving motor, or the like, a driving forcetransmitting mechanism for transmitting the driving force to wheels, asteering mechanism for adjusting the steering angle of the vehicle, abraking device for generating the braking force of the vehicle, and thelike.

The body system control unit 12020 controls the operation of variouskinds of devices provided to a vehicle body in accordance with variouskinds of programs. For example, the body system control unit 12020functions as a control device for a keyless entry system, a smart keysystem, a power window device, or various kinds of lamps such as aheadlamp, a backup lamp, a brake lamp, a turn signal, a fog lamp, or thelike. In this case, radio waves transmitted from a mobile device as analternative to a key or signals of various kinds of switches can beinput to the body system control unit 12020. The body system controlunit 12020 receives these input radio waves or signals, and controls adoor lock device, the power window device, the lamps, or the like of thevehicle.

The outside-vehicle information detecting unit 12030 detects informationabout the outside of the vehicle including the vehicle control system12000. For example, the outside-vehicle information detecting unit 12030is connected with an imaging section 12031. The outside-vehicleinformation detecting unit 12030 makes the imaging section 12031 imagean image of the outside of the vehicle, and receives the imaged image.On the basis of the received image, the outside-vehicle informationdetecting unit 12030 may perform processing of detecting an object suchas a human, a vehicle, an obstacle, a sign, a character on a roadsurface, or the like, or processing of detecting a distance thereto.

The imaging section 12031 is an optical sensor that receives light, andwhich outputs an electric signal corresponding to a received lightamount of the light. The imaging section 12031 can output the electricsignal as an image, or can output the electric signal as informationabout a measured distance. In addition, the light received by theimaging section 12031 may be visible light, or may be invisible lightsuch as infrared rays or the like.

The in-vehicle information detecting unit 12040 detects informationabout the inside of the vehicle. The in-vehicle information detectingunit 12040 is, for example, connected with a driver state detectingsection 12041 that detects the state of a driver. The driver statedetecting section 12041, for example, includes a camera that images thedriver. On the basis of detection information input from the driverstate detecting section 12041, the in-vehicle information detecting unit12040 may calculate a degree of fatigue of the driver or a degree ofconcentration of the driver, or may determine whether the driver isdozing.

The microcomputer 12051 can calculate a control target value for thedriving force generating device, the steering mechanism, or the brakingdevice on the basis of the information about the inside or outside ofthe vehicle which information is obtained by the outside-vehicleinformation detecting unit 12030 or the in-vehicle information detectingunit 12040, and output a control command to the driving system controlunit 12010. For example, the microcomputer 12051 can perform cooperativecontrol intended to implement functions of an advanced driver assistancesystem (ADAS) which functions include collision avoidance or shockmitigation for the vehicle, following driving based on a followingdistance, vehicle speed maintaining driving, a warning of collision ofthe vehicle, a warning of deviation of the vehicle from a lane, or thelike.

In addition, the microcomputer 12051 can perform cooperative controlintended for automatic driving, which makes the vehicle to travelautonomously without depending on the operation of the driver, or thelike, by controlling the driving force generating device, the steeringmechanism, the braking device, or the like on the basis of theinformation about the outside or inside of the vehicle which informationis obtained by the outside-vehicle information detecting unit 12030 orthe in-vehicle information detecting unit 12040.

In addition, the microcomputer 12051 can output a control command to thebody system control unit 12020 on the basis of the information about theoutside of the vehicle which information is obtained by theoutside-vehicle information detecting unit 12030. For example, themicrocomputer 12051 can perform cooperative control intended to preventa glare by controlling the headlamp so as to change from a high beam toa low beam, for example, in accordance with the position of a precedingvehicle or an oncoming vehicle detected by the outside-vehicleinformation detecting unit 12030.

The sound/image output section 12052 transmits an output signal of atleast one of a sound and an image to an output device capable ofvisually or auditorily notifying information to an occupant of thevehicle or the outside of the vehicle. In the example of FIG. 24 , anaudio speaker 12061, a display section 12062, and an instrument panel12063 are illustrated as the output device. The display section 12062may, for example, include at least one of an on-board display and ahead-up display.

FIG. 25 is a diagram depicting an example of the installation positionof the imaging section 12031.

In FIG. 25 , the imaging section 12031 includes imaging sections 12101,12102, 12103, 12104, and 12105.

The imaging sections 12101, 12102, 12103, 12104, and 12105 are, forexample, disposed at positions on a front nose, sideview mirrors, a rearbumper, and a back door of the vehicle 12100 as well as a position on anupper portion of a windshield within the interior of the vehicle. Theimaging section 12101 provided to the front nose and the imaging section12105 provided to the upper portion of the windshield within theinterior of the vehicle obtain mainly an image of the front of thevehicle 12100. The imaging sections 12102 and 12103 provided to thesideview mirrors obtain mainly an image of the sides of the vehicle12100. The imaging section 12104 provided to the rear bumper or the backdoor obtains mainly an image of the rear of the vehicle 12100. The imageof the front obtained in the imaging sections 12101 and 12105 is usedmainly to detect a preceding vehicle, a pedestrian, an obstacle, asignal, a traffic sign, a lane, or the like.

Incidentally, FIG. 25 depicts an example of photographing ranges of theimaging sections 12101 to 12104. An imaging range 12111 represents theimaging range of the imaging section 12101 provided to the front nose.Imaging ranges 12112 and 12113 respectively represent the imaging rangesof the imaging sections 12102 and 12103 provided to the sideviewmirrors. An imaging range 12114 represents the imaging range of theimaging section 12104 provided to the rear bumper or the back door. Abird's-eye image of the vehicle 12100 as viewed from above is obtainedby superimposing image data imaged by the imaging sections 12101 to12104, for example.

At least one of the imaging sections 12101 to 12104 may have a functionof obtaining distance information. For example, at least one of theimaging sections 12101 to 12104 may be a stereo camera constituted of aplurality of imaging elements, or may be an imaging element havingpixels for phase difference detection.

For example, the microcomputer 12051 can determine a distance to eachthree-dimensional object within the imaging ranges 12111 to 12114 and atemporal change in the distance (relative speed with respect to thevehicle 12100) on the basis of the distance information obtained fromthe imaging sections 12101 to 12104, and thereby extract, as a precedingvehicle, a nearest three-dimensional object in particular that ispresent on a traveling path of the vehicle 12100 and which travels insubstantially the same direction as the vehicle 12100 at a predeterminedspeed (for example, equal to or more than 0 km/hour). Further, themicrocomputer 12051 can set a following distance to be maintained infront of a preceding vehicle in advance, and perform automatic brakecontrol (including following stop control), automatic accelerationcontrol (including following start control), or the like. It is thuspossible to perform cooperative control intended for automatic drivingthat makes the vehicle travel autonomously without depending on theoperation of the driver or the like.

For example, the microcomputer 12051 can classify three-dimensionalobject data on three-dimensional objects into three-dimensional objectdata of a two-wheeled vehicle, a standard-sized vehicle, a large-sizedvehicle, a pedestrian, a utility pole, and other three-dimensionalobjects on the basis of the distance information obtained from theimaging sections 12101 to 12104, extract the classifiedthree-dimensional object data, and use the extracted three-dimensionalobject data for automatic avoidance of an obstacle. For example, themicrocomputer 12051 identifies obstacles around the vehicle 12100 asobstacles that the driver of the vehicle 12100 can recognize visuallyand obstacles that are difficult for the driver of the vehicle 12100 torecognize visually. Then, the microcomputer 12051 determines a collisionrisk indicating a risk of collision with each obstacle. In a situationin which the collision risk is equal to or higher than a set value andthere is thus a possibility of collision, the microcomputer 12051outputs a warning to the driver via the audio speaker 12061 or thedisplay section 12062, and performs forced deceleration or avoidancesteering via the driving system control unit 12010. The microcomputer12051 can thereby assist in driving to avoid collision.

At least one of the imaging sections 12101 to 12104 may be an infraredcamera that detects infrared rays. The microcomputer 12051 can, forexample, recognize a pedestrian by determining whether or not there is apedestrian in imaged images of the imaging sections 12101 to 12104. Suchrecognition of a pedestrian is, for example, performed by a procedure ofextracting characteristic points in the imaged images of the imagingsections 12101 to 12104 as infrared cameras and a procedure ofdetermining whether or not it is the pedestrian by performing patternmatching processing on a series of characteristic points representingthe contour of the object. When the microcomputer 12051 determines thatthere is a pedestrian in the imaged images of the imaging sections 12101to 12104, and thus recognizes the pedestrian, the sound/image outputsection 12052 controls the display section 12062 so that a squarecontour line for emphasis is displayed so as to be superimposed on therecognized pedestrian. The sound/image output section 12052 may alsocontrol the display section 12062 so that an icon or the likerepresenting the pedestrian is displayed at a desired position.

An example of the vehicle control system to which the technologyaccording to the present disclosure can be applied has been describedabove. The technology according to the present disclosure can be appliedto the imaging section 12031 among the configurations described above,for example. Specifically, the solid-state imaging element 200 in FIG. 2can be applied to the imaging section 12031 in FIG. 24 . Applying thetechnology according to the present disclosure to the imaging section12031 can improve the driving force of the transistors and obtain a moreeasy-to-see photographed image. Therefore, driver fatigue can bereduced.

It is to be noted that the above-described embodiments describe examplesfor embodying the present technology, and there is a one-to-onecorrespondence relationship between the matters in the embodiments andthe matters specifying the invention in claims. Similarly, there is aone-to-one correspondence relationship between the matters specifyingthe invention in claims and the matters, which are denoted with the samenames as the matters specifying the invention in claims, in theembodiments of the present technology. However, the present technologyis not limited to the embodiments and can be embodied by variouslymodifying the embodiments without departing from the scope of thepresent technology.

Further, the processing procedures described in the above-describedembodiments may be regarded as a method including the series ofprocedures, or may be regarded as a program for causing a computer tocarry out the series of procedures or as a recording medium storing theprogram. A CD (Compact Disc), an MD (MiniDisc), a DVD (Digital VersatileDisc), a memory card, a Blu-ray (registered trademark) Disc, or the likecan be used as the recording medium, for example.

It is to be noted that the effects described in the presentspecification are merely examples and are not limitative. Further,additional effects may be provided.

It is to be noted that the present technology can also be configured asfollows.

(1)

A solid-state imaging element including:

a first electric charge accumulating section and a second electriccharge accumulating section arranged in a predetermined direction;

a plurality of first photoelectric conversion elements;

a first transfer section configured to transfer electric charge from theplurality of first photoelectric conversion elements to the firstelectric charge accumulating section and cause the first electric chargeaccumulating section to accumulate the electric charge;

a plurality of second photoelectric conversion elements;

a second transfer section configured to transfer electric charge fromthe plurality of second photoelectric conversion elements to the secondelectric charge accumulating section and cause the second electriccharge accumulating section to accumulate the electric charge;

a first transistor configured to output a signal corresponding to anamount of the electric charge accumulated in each of the first electriccharge accumulating section and the second electric charge accumulatingsection; and

a second transistor arranged with the first transistor in thepredetermined direction and connected in parallel to the firsttransistor.

(2)

The solid-state imaging element according to (1), in which

each of the first electric charge accumulating section and the secondelectric charge accumulating section is configured to generate a voltagecorresponding to the amount of the accumulated electric charge, and

each of the first transistor and the second transistor includes anamplification transistor configured to amplify the voltage and outputthe voltage as the signal.

(3)

The solid-state imaging element according to (2), further including:

a selection transistor and a reset transistor arranged in thepredetermined direction, in which

the selection transistor is configured to, according to a predeterminedselection signal, open and close a path between: the first transistorand the second transistor; and a predetermined signal line, and

the reset transistor is configured to initialize the first electriccharge accumulating section and the second electric charge accumulatingsection.

(4)

The solid-state imaging element according to (2), further including:

a third transistor and a fourth transistor arranged in the predetermineddirection, in which

the third transistor includes a selection transistor configured to openand close a path between the first transistor and a predetermined signalline according to a predetermined selection signal, and

the fourth transistor includes a selection transistor configured to openand close a path between the third transistor and the predeterminedsignal line according to the predetermined selection signal.

(5)

The solid-state imaging element according to (4), further including:

a reset transistor and a dummy transistor arranged in the predetermineddirection, in which

the reset transistor is configured to initialize the first electriccharge accumulating section and the second electric charge accumulatingsection.

(6)

The solid-state imaging element according to (4), further including:

a reset transistor and a fifth transistor arranged in the predetermineddirection, in which

the reset transistor is configured to initialize the first electriccharge accumulating section and the second electric charge accumulatingsection.

(7)

The solid-state imaging element according to (6), in which

the fifth transistor includes an amplification transistor connected inparallel to the first transistor and the second transistor.

(8)

The solid-state imaging element according to (6), in which

the fifth transistor includes a selection transistor connected inparallel to one of the third transistor and the fourth transistor.

(9)

The solid-state imaging element according to (1), further including:

an amplification transistor and a reset transistor arranged in thepredetermined direction, in which

each of the first transistor and the second transistor includes aselection transistor configured to open and close a path between thethird transistor and the predetermined signal line according to apredetermined selection signal,

each of the first electric charge accumulating section and the secondelectric charge accumulating section is configured to generate a voltagecorresponding to the amount of the accumulated electric charge,

the amplification transistor is configured to amplify the voltage andoutput the voltage as the signal, and

the reset transistor is configured to initialize the first electriccharge accumulating section and the second electric charge accumulatingsection.

(10)

The solid-state imaging element according to any one of (1) to (9),further including:

another transistor different from the first transistor and the secondtransistor, in which

the another transistor and one of the first transistor and the secondtransistor are arranged in a direction perpendicular to thepredetermined direction.

(11)

The solid-state imaging element according to any one of (1) to (9),further including:

another transistor different from the first transistor and the secondtransistor, in which

the first transistor, the second transistor, and the another transistorare arranged in the predetermined direction.

(12)

The solid-state imaging element according to any one of (1) to (10),further including:

a wiring layer, in which

a signal line connected to the first transistor and the secondtransistor is wired along the predetermined direction.

(13)

An imaging apparatus including:

a first electric charge accumulating section and a second electriccharge accumulating section arranged in a predetermined direction;

a plurality of first photoelectric conversion elements;

a first transfer section configured to transfer electric charge from theplurality of first photoelectric conversion elements to the firstelectric charge accumulating section and cause the first electric chargeaccumulating section to accumulate the electric charge;

a plurality of second photoelectric conversion elements;

a second transfer section configured to transfer electric charge fromthe plurality of second photoelectric conversion elements to the secondelectric charge accumulating section and cause the second electriccharge accumulating section to accumulate the electric charge;

a first transistor configured to output a signal corresponding to anamount of the electric charge accumulated in each of the first electriccharge accumulating section and the second electric charge accumulatingsection;

a second transistor arranged with the first transistor in thepredetermined direction and connected in parallel to the firsttransistor; and

a signal processing section configured to perform predeterminedprocessing on the signal.

REFERENCE SIGNS LIST

-   -   100 Imaging apparatus    -   110 Optical section    -   120 DSP circuit    -   130 Display section    -   140 Operation section    -   150 Bus    -   160 Frame memory    -   170 Storage section    -   180 Power supply section    -   200 Solid-state imaging element    -   210 Vertical driving section    -   220 System control section    -   230 Column processing section    -   240 Horizontal driving section    -   300 Pixel array section    -   310 Tr sharing block    -   320, 350 FD sharing block    -   321, 322, 326, 329, 351, 352, 356, 359 Photodiode    -   323, 324, 327, 328, 353, 354, 357, 358 Transfer transistor    -   330, 334, 360 Selection transistor    -   331, 333, 361 Amplification transistor    -   332 Dummy transistor    -   362 Reset transistor    -   410 Photoelectric conversion layer    -   420 Transistor layer    -   430 First wiring layer    -   440 Second wiring layer    -   460 Third wiring layer    -   11402, 12031 Image pickup unit, imaging section

The invention claimed is:
 1. An imaging device comprising: a firstsection including eight photoelectric conversion elements, eighttransfer transistors, a first floating diffusion, and a second floatingdiffusion; a second section including eight photoelectric conversionelements, eight transfer transistors, a third floating diffusion, and afourth floating diffusion, wherein the second section is adjacent to thefirst section in a plan view; and a first amplification transistor, asecond amplification transistor, a reset transistor and a selectiontransistor disposed between the first section and the second section,wherein the first floating diffusion is coupled to the second floatingdiffusion, the first floating diffusion is coupled to the firstamplification transistor and the second amplification transistor, thesecond floating diffusion is coupled to the first amplificationtransistor and the second amplification transistor, and the firstamplification transistor is disposed adjacent to the secondamplification transistor in the plan view.
 2. The imaging deviceaccording to claim 1, wherein the first floating diffusion and thesecond floating diffusion are disposed along a first direction, and thethird floating diffusion and the fourth floating diffusion are disposedalong the first direction in the plan view.
 3. The imaging deviceaccording to claim 2, wherein the selection transistor, the firstamplification transistor, second amplification transistor, and the resettransistor are disposed along the first direction in this order in theplan view.
 4. The imaging device according to claim 2, wherein the firstfloating diffusion and the second floating diffusions are disposed alongthe first direction in the plan view.
 5. The imaging device according toclaim 1, wherein first to fourth floating diffusions are disposed in asemiconductor substrate.
 6. The imaging device according to claim 1,wherein the first amplification transistor and the second amplificationtransistor are coupled to a vertical signal line through the selectiontransistor.
 7. The imaging device according to claim 1, wherein thefirst amplification transistor is coupled to the second amplificationtransistor in parallel.
 8. The imaging device according to claim 1,wherein the first amplification transistor and the second amplificationtransistor are configured to output a signal corresponding to an amountof electric charge accumulated in the first floating diffusion and thesecond floating diffusion.
 9. The imaging device according to claim 1,wherein a shape of the first section and the second section arerectangles in the plan view.